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1/22 www.rohm.com 2011.02 - rev. a ? 2011 rohm co., ltd. all rights reserved. image correction ics image correction ic for panel BU1523KV description BU1523KV is an image quality adjustment ic for in-vehicle di splays. it can control brightness, contrast, hue, intensity, sharpness, etc. it is equipped with both rgb and ycbcr as i nput/output interfaces. it also incorporates lvds output capability with an embedded lvds transmitter. features 1) rgb input data format width of data bus 24bit vertical/horizontal synchronizing and data enable signal 2) rgb output data format it is the same as the entry format 3) ycbcr input data format itu-r bt.656-4 or synchronization signal ycbcr width of data bus 8bit vertical/horizontal synchronizing and data field signal date range conform itu-r bt.601 or full range 4) ycbcr output data format the same as the entry format capable of processing bt. 656 input to generate and output synchronization signal from sav/eav 5) rgb if image quality adjustment contrast, brightness, hue, chroma and sharpness independent rgb gamma correction 6) ycbcr image quality adjustment contrast, brightness, hue, chroma and sharpness 7) lvds transmitter built-in lvds transmitter converts rgb24 bit, vertical/horizontal synchronization signal and data enable inputs into 4ch lvds data streams 8) 2-line serial interface slave function the register in BU1523KV can be set 9) package vqfp100 applications in-vehicle display etc. no.11060eat05
technical note 2/22 www.rohm.com 2011.02 - rev. a ? 2011 rohm co., ltd. all rights reserved. BU1523KV absolute maximum ratings [table 1] parameter symbol ratings unit supply voltage 1 vddio -0.3 +4.0 v supply voltage 2 vddi2c -0.3 +4.0 v supply voltage 3 pvdd -0.3 +4.0 v supply voltage 4 lvdd -0.3 +4.0 v supply voltage 5 vdd -0.3 +2.1 v input voltage range vin -0.3 io_lvl+0.3 *1 v storage temperature range tstg -40 +125 power dissipation pd 1000 *2 , 1499 *3 mw *1 io_lvl is a generic name of vddio, vddi2c *2 ic only. in the case exceeding 25 , 10mw should be reduced at the rating 1 . *3 when packaging a glass epoxy boar d of 70x70x1.6mm. if exceeding 25 , 14.99mw should be reduced at the rating 1 * has not been designed to withstand radiation. * operation is not guaranteed at absolute maximum ratings. operating conditions [table 2] parameter symbol ratings unit min. typ. max. supply voltage1(io) vddio 3.0 3.3 3.6 v supply voltage2(io) vddi2c 3.0 3.3 3.6 v supply voltage3(pll) pvdd 3.0 3.3 3.6 v supply voltage4(lvds) lvdd 3.0 3.3 3.6 v supply voltage5(core) vdd 1.65 1.8 1.95 v input voltage range vin 0.0 - io_lvl *1 v operating temperature range topr -40 - +85 *1 io_lvl is a generic name of vddio, vddi2c. * please supply power source in order of vdd (vddio, vddi2c, pvdd,lvdd).
technical note 3/22 www.rohm.com 2011.02 - rev. a ? 2011 rohm co., ltd. all rights reserved. BU1523KV block diagram *change their modes with register setting. fig. 1 block diagram terminal selection from register i2c if (slave) register rdi0~rdi7 gdi0~gdi7 bdi0~bdi7 resetb scl sda pll tap/tan tbp/tbn rgb/ ycbcr convert hue adjust chroma adjust lpdnb contrast adjust brightness adjust sharpnes adjust ycbcr/ rgb convert rgb gamma output data convert lvds transmitter tdp/tdn tcp/tcn tckp/tckn sav/eav detect hue adjust chroma adjust sharpnes adjust contrast adjust brightness adjust output data convert rgbmute mir_en rgbcki rgbhsi rgbvsi rgbdei ydi0~ydi7 ycki yhsi yvsi yfldi test0 test1 ydo0~ydo7 ycko yhso yvso yfldo y cbcr y cbcr rgb i2cdev i2c if (slave) register resetb scl sda pll tap/tan tbp/tbn rgb/ ycbcr conversion hue adjust chroma adjust sharpnes adjust contrast adjust brightness adjust ycbcr/ rgb convert rgb gamma output data convert lvds transmitter tdp/tdn tcp/tcn tckp/tckn rgbcki rgbhsi rgbvsi rgbdei test0 test1 y cbcr rgb i2cdev rdo0~rdo7 gdo0~gdo7 bdo0~bdo7 rgbcko rgbhso rgbvso rgbdeo lpdnb rdi0~rdi7 gdi0~gdi7 bdi0~bdi7 rgbmute mir_en rgb if image quality adjustment part ycbcr if image quality adjustment part rgb if image quality adjustment part the lvds data output mode the rgb data output mode (ycbcr interface cannot be used.)
technical note 4/22 www.rohm.com 2011.02 - rev. a ? 2011 rohm co., ltd. all rights reserved. BU1523KV terminal functions ? equivalent circuit diagram [table 3 terminal functions (1/4)] pin no. pin name in/out (*1) init (*2) function description powersupply system (*4) i/o type 1 bdi4 i - rgb b data [4] input a a 2 bdi5 i - rgb b data [5] input a a 3 bdi6 i - rgb b data [6] input a a 4 bdi7 i - rgb b data [7] input a a 5 rgbhsi i - rgb h sync input a a 6 rgbvsi i - rgb v sync input a a 7 rgbdei i - rgb data enable input a a 8 gnd g - ground a,b - 9 rgbcki i - rgb clock input a b 10 vddio p - io power source a - 11 i2cvdd p - 2-line serial interface io power source b - 12 sda i/o in 2-line serial interface data input / output (*6) b g 13 scl i - 2-line serial interface clock input b h 14 gnd g - ground a,b - 15 vddio p - io power source a - 16 vdd p - core power source - - 17 ydo7/rgbdeo o low bt601 ycbcr data [7] / rgb data output a d 18 ydo6/rgbvso o low bt601 ycbcr data [6] / rgb v sync output a d 19 ydo5/rgbhso o low bt601 ycbcr data [5] / rgb h sync output a d 20 ydo4/bdo7 o low bt601 ycbcr data [4] / rgb b data [7] output a d 21 ydo3/bdo6 o low bt601 ycbcr data [3] / rgb b data [6] output a d 22 ydo2/bdo5 o low bt601 ycbcr data [2] / rgb b data [5] output a d 23 ydo1/bdo4 o low bt601 ycbcr data [1] / rgb b data [4] output a d 24 ydo0/bdo3 o low bt601 ycbcr data [0] / rgb b data [3] output a d 25 yfldo/bdo2 o low bt601 field output / rgb b data [2] output a d * fix an unused input pin to gnd or vddio (fix sda and scl to i2cvdd. test0 and test1 are excluded.) . *1) ?i? shows the input, ?o? shows the output, ?i/o? shows t he bidirection, ?p? shows the pow er supply, and ?g? shows gnd. *2) ?pd? shows the pull-down, ?in? shows the i nput mode, and ?low? shows the low level output. *4) "a" in the column in the power supply system shows v ddio, "b" shows i2cvdd, "c" shows lvdd, and "d" shows pvdd. *6) ?sda? is output at "l" level when usually using it or is in the state of high impedance, and "h" level is not output.
technical note 5/22 www.rohm.com 2011.02 - rev. a ? 2011 rohm co., ltd. all rights reserved. BU1523KV [table 3 terminal functions (2/4) ] pin no. pin name in/out (*1) init (*2) function description power supply system (*4) i/o type 26 yvso/bdo1 o low bt601 ycbcr data [1] / rgb v sync output a d 27 yhso/bdo0 o low bt601 ycbcr data [0] / rgb h sync output a d 28 gnd g - ground a,b - 29 ycko/rgbcko o low bt601 clock output / rgb clock output a d 30 vddio p - io power source a - 31 gdo7 o low rgb g data [7] output a d 32 gdo6 o low rgb g data [6] output a d 33 gdo5 o low rgb g data [5] output a d 34 gdo4 o low rgb g data [4] output a d 35 vddio p - io power source a - 36 ycki/gdo3 i/o in bt656 clock input / rgb g data [3] output (*5) a f 37 gnd g - ground a,b - 38 yhsi/gdo2 i/o in bt656 h sync input / rgb g data [2] output (*5) a e 39 yvsi/gdo1 i/o in bt656 v sync input / rgb g data [1] output (*5) a e 40 yfldi/gdo0 i/o in bt601 field input / rgb g data [0] output a e 41 vdd p - core power source - - 42 ydi0/rdo7 i/o in bt656 y data [0] input / rgb r data [7] output (*5) a e 43 ydi1/rdo6 i/o in bt656 y data [1] input / rgb r data [6] output (*5) a e 44 ydi2/rdo5 i/o in bt656 y data [2] input / rgb r data [5] output (*5) a e 45 vddio p - io power source a - 46 ydi3/rdo4 i/o in bt656 y data [3] input / rgb r data [4] output (*5) a e 47 ydi4/rdo3 i/o in bt656 y data [4] input / rgb r data [3] output (*5) a e 48 ydi5/rdo2 i/o in bt656 y data [5] input / rgb r data [2] output (*5) a e 49 ydi6/rdo1 i/o in bt656 y data [6] input / rgb r data [7] output (*5) a e 50 ydi7/rdo0 i/o in bt656 y data [7] input / rgb r data [0] output (*5) a e * fix an unused input pin to gnd or vddio (fix sda and scl to i2cvdd. test0 and test1 are excluded.) . *1) ?i? shows the input, ?o? shows the output, ?i/o? shows t he bidirection, ?p? shows the pow er supply, and ?g? shows gnd. *2) ?pd? shows the pull-down, ?in? shows the i nput mode, and ?low? shows the low level output. *4) "a" in the column in the power supply system shows v ddio, "b" shows i2cvdd, "c" shows lvdd, and "d" shows pvdd. *5) 36-50 pins direction depends on the modes. the rgb data output mode: output the lvds data output mode: input
technical note 6/22 www.rohm.com 2011.02 - rev. a ? 2011 rohm co., ltd. all rights reserved. BU1523KV [table 3 terminal functions (3/4) ] pin no. pin name in/out (*1) init (*2) function description power supply system (*4) i/o type 51 gnd g - ground a,b - 52 i2cdev i - i 2 c device address setting a a 53 rgbmute i - mute signal : high active a b 54 mir_en i - lvds data mirror enable : high active a a 55 test0 i pd test pin 0 (*3) (connect to gnd) a c 56 test1 i pd test pin 1 (*3) (connect to gnd) a c 57 resetb i - logic reset signal: low active a b 58 lpdnb i - lvds reset signal: low active a b 59 vddio p - io power source a - 60 pgnd g - pll ground d - 61 pvdd p - pll ground d - 62 lgnd g - lvds ground c - 63 tdp o - lvds data output d ch p c i 64 tdn o - lvds data output d ch n c i 65 tckp o - lvds clock output p c i 66 tckn o - lvds clock output n c i 67 tcp o - lvds data output c ch p c i 68 tcn o - lvds data output c ch n c i 69 lgnd g - lvds ground c - 70 lvdd p - lvds power source c - 71 tbp o - lvds data output b ch p c i 72 tbn o - lvds data output b ch n c i 73 tap o - lvds data output a ch p c i 74 tan o - lvds data output a ch n c i 75 lgnd g - lvds ground c - * fix an unused input pin to gnd or vddio (fix sd a and scl to i2cvdd. test0 and test1 are excluded.) . *1) ?i? shows the input, ?o? shows the output, ?i/o? shows t he bidirection, ?p? shows the pow er supply, and ?g? shows gnd. *2) ?pd? shows the pull-down, ?in? shows the input mode, and ?low? shows the low level output. *3) fix test0 and test1 to gnd (the opening is a prohibition of use) *4) "a" in the column in the power supply system shows v ddio, "b" shows i2cvdd, "c" shows lvdd, and "d" shows pvdd.
technical note 7/22 www.rohm.com 2011.02 - rev. a ? 2011 rohm co., ltd. all rights reserved. BU1523KV [table 3 terminal functions (4/4) ] pin no. pin name in/out (*1) init (*2) function description power supply system (*4) i/o type 76 gnd g - ground a,b - 77 rdi0 i - rgb r data [0] input a a 78 rdi1 i - rgb r data [1] input a a 79 rdi2 i - rgb r data [2] input a a 80 rdi3 i - rgb r data [3] input a a 81 rdi4 i - rgb r data [4] input a a 82 rdi5 i - rgb r data [5] input a a 83 rdi6 i - rgb r data [6] input a a 84 rdi7 i - rgb r data [7] input a a 85 vddio p - io power source a - 86 gdi0 i - rgb g data [0] input a a 87 gdi1 i - rgb g data [1] input a a 88 gnd g - gnd a,b - 89 gdi2 i - rgb g data [2] input a a 90 gdi3 i - rgb g data [3] input a a 91 gdi4 i - rgb g data [4] input a a 92 gdi5 i - rgb g data [5] input a a 93 gdi6 i - rgb g data [6] input a a 94 gdi7 i - rgb g data [7] input a a 95 vdd p - core power source - - 96 bdi0 i - rgb b data [0] input a a 97 bdi1 i - rgb b data [1] input a a 98 bdi2 i - rgb b data [2] input a a 99 bdi3 i - rgb b data [3] input a a 100 vddio p - io power source a - * fix an unused input pin to gnd or vddio (fix sda and scl to i2cvdd. test0 and test1 are excluded.) . *1) ?i? shows the input, ?o? shows the output, ?i/o? shows t he bidirection, ?p? shows the pow er supply, and ?g? shows gnd. *2) ?pd? shows the pull-down, ?in? shows the input mode, and ?low? shows the low level output. *4) "a" in the column in the power supply system shows v ddio, "b" shows i2cvdd, "c" shows lvdd, and "d" shows pvdd.
technical note 8/22 www.rohm.com 2011.02 - rev. a ? 2011 rohm co., ltd. all rights reserved. BU1523KV [table 4 (1/2)] type equivalent circuit configuration type equivalent circuit configuration a input terminal b input terminal with schmitt c input terminal with pull down d output terminal e input/output terminal f input/output terminal with schmitt g input/output terminal (2-line serial i/f) h input terminal with schmitt (2-line serial i/f) gnd vddio vddio to internal gnd vddio gnd to internal vddio gnd vddio gnd gnd to internal internal signal internal signal internal signal vddio vddio gnd vddio gnd to internal internal signal internal signal internal signal vddio gnd i2cvdd to internal vddio gnd gnd internal signal vddio internal si g nal vddio g nd vddio gnd g nd to internal i2cvdd i2cvdd gnd i2cvdd gnd gnd to internal internal signal internal signal internal signal
technical note 9/22 www.rohm.com 2011.02 - rev. a ? 2011 rohm co., ltd. all rights reserved. BU1523KV [table 4 (2/2)] type equivalent circuit configuration i output terminal (lvds) pin configurations [pin no.] pin name fig.2 pin configurations gnd lvdd lvdd gnd internal signal internal signal internal signal internal signal internal signal internal signal t*p t*n [50] ydi7/rdo0 [49] ydi6/rdo1 [48] ydi5/rdo2 [47] ydi4/rdo3 [46] ydi3/rdo4 [45] yddio [44] ydi2/rdo5 [43] ydi1/rdo6 [42] ydi0/rdo7 [41] ydd [40] yfldi/gdo0 [39] yvsi/gdo1 [38] yhsi/gdo2 [37] gnd [36] ycki/gdo3 [35] yddio [34] gdo4 [33] gdo5 [32] gdo6 [31] gdo7 [30] vddio [29] ycko/rgbcko [28] gnd [27] yhso/bdo0 [26] yvso/bdo1 gnd [76] rdi0 [77] rdi1 [78] rdi2 [79] rdi3 [80] rdi4 [81] rdi5 [82] rdi6 [83] rdi7 [84] vddio [85] gdi0 v [86] gdi1 [87] gnd [88] gdi2 [89] gdi3 [90] gdi4 [91] gdi5 [92] gdi6 [93] gdi7 [94] vdd [95] bdi0 [96] bdi1 [97] bdi2 [98] bdi3 [99] vddio [100] [74] tan [75] lgnd [73] tap [72] tbn [70] lvdd [71] tbp [68] tcn [69] lgnd [67] tcp [66] tckn [54] tdn [65 ]tckp [62] lgnd [63] tdp [61] pvdd [60] pgnd [58] lpdnb [59] vddio [56] test1 [57] resetb [55] test0 [54] mir_en [52] i2cdev [53] rgbmute [51] gnd bdi5 [2] bdi4 [1] bdi6 [3] bdi7 [4] rgbhsi [5] gnd [8] rgbdei [7] rgbcki [9] vddio [10] sda [12] i2cvdd [11] gnd [14] scl [13] vddio [15] vdd [16] ydo6/rgbvso [18] ydo7/rgbdeo [17] ydo4/bdo7 [20] ydo5/rgbhso [19] ydo3/bdo6 [21] ydo2/bdo0 [22] ydo0/bdo3 [24] ydo1/bdo4 [23] yfldo/bdo2 [25] rgbvsi [6] 1pin mark
technical note 10/22 www.rohm.com 2011.02 - rev. a ? 2011 rohm co., ltd. all rights reserved. BU1523KV electrical characteristics (dc) [table 5] unless otherwise specified, vdd=1.80v, vddio=3.3v, i2cvdd=3.3v, pvdd=3.3v, lv dd=3.3v, gnd=0.0v, ta=25 , fin=36mhz parameter symbol limits unit condition min. typ. max. input frequency 1 fin1 8.0 - 36.0 mhz rgbcki input frequency 2 fin2 8.0 - 55.0 mhz ycki input clock duty dcki 45 50 55 % rgbcki, ycki operational current idd1 - 16 - ma 36mhz (vdd) lvds supply current ilvdd1 - 55 - ma 36mhz, lvds_rs = 1 (lvdd, pvdd) input toggle pattern (fig.4) lvds supply current ilvdd2 - 38 - ma 36mhz, lvds_rs = 0 (lvdd, pvdd) input toggle pattern (fig.4) leakage current iddst1 - - 50 a release reset , input pin =gnd (vdd) input ?h? current iih -10 - 10 a vih=io_lvl input ?l? current iil -10 - 10 a vil=gnd pull-down current ipd 25 50 100 a vih=io_lvl input ?h? voltage 1 vih1 io_lvl x0.8 - io_lvl +0.3 v normal input (including input mode of i/o terminal) input ?l? voltage 1 vil1 -0.3 - io_lvl x 0.2 v normal input (including input mode of i/o terminal) input ?h? voltage 2 vih2 io_lvl x0.85 - io_lvl +0.3 v hysteresis input (resetb, rgbcki, ycki, lpdnb, scl, rgbmute) input ?l? voltage 2 vil2 -0.3 - io_lvl x 0.15 v hysteresis input (resetb, rgbcki, ycki, lpdnb, scl, rgbmute) output ?h? voltage voh io_lvl -0.4 - io_lvl v ioh=-1.0ma(dc) (including output mode of i/o terminal) output ?l? voltage vol 0.0 - 0.4 v iol=1.0ma(dc) (including output mode of i/o terminal) lvds transmitter differential output voltage vod 250 350 450 mv rl=100 ? normal swing lvds_rs (*1) = 1 120 200 300 mv reduced swing lvds_rs (*1) = 0 change in vod between complementary output states vod - - 35 mv rl=100 ? common mode voltage voc 1.125 1.25 1.375 v change in voc between complementary output states voc - - 35 mv output short circuit current ios - - -24 ma vout (*2) =0v, rl=100 ? output tri-state current ioz - - 10 a lpdnb=gnd vout (*2) =gnd to lvdd * io_lvl is a generic name of vddio, vddi2c. (*1) lvds_rs is a register name cont rolled with 2-line serial interface. (*2) vout=tan/p, tbn/p, tcn/p, tdn/p, tckn/p
technical note 11/22 www.rohm.com 2011.02 - rev. a ? 2011 rohm co., ltd. all rights reserved. BU1523KV rl fig.3 lvds transmitter characteristic diagram input waveform to the lvds transmitter block tx0-7 are the data before being serialized by the lvds transmitter. refer to fig.8 for the serialized data sequence. fig.4 input toggle pattern x=a,b,c,d rl clkin tx0 tx1 tx2 tx3 tx4 tx5 tx6
technical note 12/22 www.rohm.com 2011.02 - rev. a ? 2011 rohm co., ltd. all rights reserved. BU1523KV cms cmh cki cko ohh ohl odv electric characteristics (ac) 1. image quality adjustment data input interface timing fig.5 data input interface timing [table 6] unless otherwise specified, vdd=1.80v, vddio=3.3v, i2cvdd=3.3v, pvdd=3.3v, lvdd=3.3v, gnd=0.0v, ta=25 symbol description min. typ. max. unit t cki1 rgbcki clock cycle 27.7 - 125 ns t cki2 ycki clock cycle 18.1 - 125 ns d cki rgb(y)cki clock duty 45 50 55 % t cms rgb(y)cki rise / fall set-up time 6 - - ns t cmh rgb(y)cki rise / fall hold time 5 - - ns * rgb(y)ck_pol is an internal register of BU1523KV to determine the polarity of rgb(y)cki. * ensure to make the total number of 1 line input pixels to yc bcr interface to be even (multipl e of 4, in case of cycles). 2. image quality adjustment data output interface timing fig.6 data output interface timing [table 7] unless otherwise specified, vdd=1.80v, vd dio=i2cvdd=pvdd=lvdd=3.3v, gnd=0.0v, ta=25 symbol description min. typ. max. unit t cko1 rgbcko clock cycle 27.7 - 125 ns t cko2 ycko clock cycle 18.1 - 125 ns d cko1 rgbcko clock duty 40 50 60 % d cko2 ycko clock duty 35 50 65 % t odv output delay r(g, b,y)do - - 5 ns t ohl, t ohh output delay rgb(y)vso, rgb(y)hso, reno/yfldo - - 5 ns * the above figure shows the waveform when rgb(y)ck_pol= ?1? is set. when rgb(y)ck_pol= ?0? is set, rgb(y)vso, rgb(y)hso and rgb(y)do are output at the falling edge of rgb(y)cko. rgb(y)vsi / rgb(y)hsi rgbdei / yfldi r(g,b,y)di[7:0] rgb(y)cki (rgb(y)ck_pol=1) rgb(y)cki (rgb(y)ck_pol=0) rgb(y)cko (r(y) ck_pol=1) rgb(y)vso / rgb(y)hso reno / yfldo r(g,b,y)do
technical note 13/22 www.rohm.com 2011.02 - rev. a ? 2011 rohm co., ltd. all rights reserved. BU1523KV 3. lvds transmitter switching characteristic [table 8] unless otherwise specified, vdd=1.80v, vd dio=i2cvdd=pvdd=lvdd=3.3v, gnd=0.0v, ta=25 , fin=36mhz symbol description min typ max unit tlvt ldvs transition time - 0.6 1.5 ns ttop1 output data position 0 -1.2 0.0 +1.2 ns ttop0 output data position 1 7 t cki -1.2 7 t cki 7 t cki +1.2 ns ttop6 output data position 2 2 7 t cki -1.2 2 7 t cki 2 7 t cki +1.2 ns ttop5 output data position 3 3 7 t cki -1.2 3 7 t cki 3 7 t cki +1.2 ns ttop4 output data position 4 4 7 t cki -1.2 4 7 t cki 4 7 t cki +1.2 ns ttop3 output data position 5 5 7 t cki -1.2 5 7 t cki 5 7 t cki +1.2 ns ttop2 output data position 6 6 7 t cki -1.2 6 7 t cki 6 7 t cki +1.2 ns tpll phase locked loop set time - - 10.0 ms fig.7 lvds output ac timing diagram 1 lvds output vdiff=(txp)-(txn) cl txn txp lvds output load rl v diff 80% 20% 80% 20% t lvt t lvt
technical note 14/22 www.rohm.com 2011.02 - rev. a ? 2011 rohm co., ltd. all rights reserved. BU1523KV fig.8 lvds output ac timing diagram 2 * power shows vddio, i2cvdd, vdd, lvdd, pvdd * clkin is a clock input to the lvds transmitter. fig.9 lvds phase locked loop set time t pll lpdnb power tckp/n clkin next cycle t top1 tap/n ta6 ta5 ta4 ta3 ta2 ta1 ta0 tbp/n tb6 tb5 tb4 tb3 tb2 tb1 tb0 tcp/n tc6 tc5 tc4 tc3 tc2 tc1 tc0 tdp/n td6 td5 td4 td3 td2 td1 td0 t top0 t top6 t top5 t top4 t top3 t top2 previous cycle tckp/n out (differential)
technical note 15/22 www.rohm.com 2011.02 - rev. a ? 2011 rohm co., ltd. all rights reserved. BU1523KV 4. 2-line serial interface timing fig.10 2-line serial interface timing [table 9] unless otherwise specified, vdd=1.80v, vddio=3.3v, i2cvdd=3.3v, pvdd=3.3v, lvdd=3.3v, gnd=0.0v, ta=25 symbol description min typ max unit f scl sdl clock frequency 0 - 400 khz t hd;sta holding time(repetition) ?start? condition after this period, the first clock pulse is generated. 0.6 - - s t low low period of sdl clock 1.3 - - s t high high period of sdl clock 0.6 - - s t su;sta setup time of repetition ?start? condition 0.6 - - s t hd;dat data hold time 0 s t su;dat data setup time 100 - - ns t su;sto setup time of 'stop' condition 0.6 - - s t buf 'bus free time between stop' condition and 'start' condition 1.3 - - s t low sda scl t hd;sta t hd;dat t high t su;dat t su;sta t hd;st a t su;sto t buf
technical note 16/22 www.rohm.com 2011.02 - rev. a ? 2011 rohm co., ltd. all rights reserved. BU1523KV operation explanation of each block 1. image quality adjustment of rgb interface it adjusts image quality input through 24-bit rgb interface. the supported i/o interface consists of 24-bit data, vertical synchronization signal, horizontal synchronization signal and data enable signal. it converts 24-bit rgb into ycbcr444 and makes adjustment on the contrast, brightness, sharpness, hue and intensity in the ycbcr space. the contrast, brightness and sharpness are adjusted against the luminance (y) component and the hue and intensity are adjusted against the color difference (cbcr) component. in addition to the image quality adjustment in the ycbcr space, it is also equipped with the rgb independent gamma correction capability in the rgb space. converting ycbcr444 to 24-bit rgb, gamma correction is made to each of the rgb components. 16 gamma curve points can be set and the intervals between those set points are linearly interpolated. when the rgbmute terminal is set to ?high? level, the rgb output data will be all ?0? from the next frame. 2. image quality adjustment of yuv it adjusts image quality input through ycbcr422 interface. the supported i/o interfaces are itu-r bt.656-4 and ycbcr with synchronization signal (complied with itu-r bt.601). when the input is itu-r bt.656-4, the output can be se lected from itu-r bt.656-4 and ycbcr with synchronization signal. however, when the input is ycbcr with synchronization signal, the output can only be ycbcr with synchronization signal. it makes adjustment on the contrast, brightness, sharpness, hue and intensity in the ycbcr space. the contrast, brightness and sharpness are adjusted against the luminance (y) component and the hue and intensity are adjusted against the color difference (cbcr) component. 3. lvds transmitter it outputs high-speed serial data for image quality adjustment of rgb interface in lvds format. the data mapping to be output in the lvds format can be changed by the register setting. when the lpdnb terminal is set to ?low? level, the lvds transmitter part will go into power down mode. the lvds output will become hi-z status. 4. 2-line serial interface 2-line serial interface slave function is embedded. the register s are accessed through this interface. the slave address is 46h (in 7-bit notation) when i2cdev=0 and 47h (in 7-bit notation) when i2cdev=1. the sub address is automatically incremented when consecutively accessed twice or more in read or write operation. * slave address of 46h and 47h are in hexadecimal. * fig.11 depicts the status when i2cdev=0. fig.11 2-line serial interface format sda scl data sending and receiving wave form 1-7 8 s 1-7 8 9 stop condition 91-789p a c k a ck sub address data a ck slave address r/w start condition write sequence read sequence s = start condition a(s) = acknowledge by slave a(s) = not acknowledge by slave p = stop condition a(m) = acknowledge by master a(m) = not acknowledge by master a(m)/ a(m) p a(s) read data a(m) read data p s slave address (46h) w (0) a(s) sub address a(s) s slave address (46h) r (1) write data a(s) write data a(s)/ a(s) sub address a(s) write data a(s) s slave address (46h) w (0) a(s)
technical note 17/22 www.rohm.com 2011.02 - rev. a ? 2011 rohm co., ltd. all rights reserved. BU1523KV example of application circuit v dd (3.3v system) v dd (3.3v system) v dd (3.3v system) vddio gnd resetb test0,1,2 lvdd lgnd pvdd pgnd f.bead*1 0.1uf 0.01uf 0.1uf 0.01uf lvdd pvdd pgnd 0.1uf 0.01uf 0.1uf 0.01uf lgnd ra- ra+ rb- rb+ rc- rc+ rclk- rclk+ rd- rd+ clkout r4 r5 r6 r7 r8 r9 g4 g5 g6 g7 g8 g9 b4 b5 b6 b7 b8 b9 tc4 tc5 tc6 td0 td1 td2 td3 td4 td5 open r0 r1 g0 g1 b0 b1 pd clkout ra0 pd vdd gnd ra1 ra2 ra3 ra4 ra5 ra6 rb0 rb1 rb2 rb3 rb4 rb5 rb6 rc0 rc1 rc2 rc3 rc4 rc5 rc6 rd0 rd1 rd2 rd3 rd4 rd5 rd6 re0 re1 re2 re3 re4 re5 re6 open oe d k r/f 0.1uf 0.01uf 0.1uf 0.01uf f.bead*1 *1: recommended parts: f.bead: blm18a-series (murata manufacturing) *2: if lvds_rs is tied to ?1?, lvds swing is 350m v. if lvds_rs is tied to ?0?, lvds swing is 200m v. pcb(transmitter) pcb(receiver) 100otwist pair cable or pcb trace BU1523KV bu16002kvt tan tap tbn tbp tcn tcp tclk tclk tdn tdp lpdb rmute sda scl rcko bdo4 bdo3 bdo2 open open open open i2cvdd 0.1uf 0.01uf v dd (1.8v system) vdd 0.1uf 0.01uf dvd, digital tv encoder, camera etc. main cpu (graphic lsi) [rgb data] rgbcki, rgbvsi, rgbhsi, rgbdei, rdi0 7, gdi0 7, bdi0 7 [bt.656 data] ycki,yfldi, yvsi, yhsi, ydi0 7 [bt.601 data] ycko,yfldo, yvso, yhso, ydo0 7 i2cdev reset ic fig.12 BU1523KV system connection diagram the above figure is an example of system connection for reference only and not intended to guarantee operation.
technical note 18/22 www.rohm.com 2011.02 - rev. a ? 2011 rohm co., ltd. all rights reserved. BU1523KV procedure for turning on power supply follow the power-on sequence of vdd (vddio, i2cvdd, pvdd, lvdd) as depicted in fig.13. the timing for power-on sequence is shown in table 10 however, it is recommended to make the intervals of t pwuv2 , t pwuv and t pwuvl as short as possible. until after voltage is applied to all the power sources, the levels of all the input pins are fixed and the low level is input onto resetb, the internal status and pins remain unstable. remove the reset after inputting the clock (rgbcki, ycki). when the clock (rgbcki, ycki) is to be temporarily halted during the operation, apply the reset after the clock (rgbcki, ycki) stopped to fix the operation, then follow the power-on sequence and remove the reset after inputting the clock (rgbcki, ycki). 2-line serial inte rface is enabled for communication after th e reset (resetb) is removed. however, racing may be caused if the rising edge of the reset (resetb) signal and the signal change of 2-line serial interface occur at the same time. ensure not to allow the rising edge of the reset (resetb) signal and the signal change of 2-line serial interface to occur at the same time. design the system to avoid racing and system malfunction when the internal status and pins are unstable. * the reset is also possible by the software reset (srst_r_ip, srst_y_ip, srst_lvds). fig.13 power supply input procedure (min level is power-supply voltage lower bound of recommended range.) [table 10 recommended value at time to turn on power supply] item min. max. unit t pwuv2 0 50 ms t pwuv 0 50 ms t pwuvl 0 50 ms t uncv2 0 1 ms t uncv 0 1 ms t rr 1 - ms t cr 0.1 - ms t pwuv2 t uncv vdd pvdd lvdd resetb lpdnb t rr rgbcki ycki t rr t cr t cr vddio i2cvdd t pwuv t pwuvl use pvdd and lvdd together. i2cvdd a ll input terminals of group t uncv2 regulations from start of i2cvdd regulations from start of i2cvdd min level voltage min level voltage min level voltage min level voltage clock input clock input release reset after inputting the clock. release reset after inputting the clock. reset after the clock stops. clock stop reset state reset state the state of the terminal is invalid. vddio a ll input terminals of group
technical note 19/22 www.rohm.com 2011.02 - rev. a ? 2011 rohm co., ltd. all rights reserved. BU1523KV the power-off sequence is reverse of the power-on sequence, in the order of (vddio, i2cvdd, pvdd, lvdd) vdd as depicted in fig.14. the timing for power-off sequence is shown in table 11, however, it is recommended to make the intervals of t pwdv2m , t pwdv and t pwdvl as short as possible. note that turning off from the vdd (power to the internal core) makes the internal status and pin status unstable. fig.14 power-off procedure (min level is power-supply voltage lower bound of recommended range of motion.) [table 11 power-off time recommended value] item min. max. unit t pwdv2 0 50 ms t pwdv 0 50 ms t pwdvl 0 50 ms vdd pvdd lvdd t pwdv i2cvdd t pwdv vddio t pwd use pvdd and lvdd together. min level voltage min level voltage min level voltage min level voltage operation s tate operation stop
technical note 20/22 www.rohm.com 2011.02 - rev. a ? 2011 rohm co., ltd. all rights reserved. BU1523KV pcb design guideline for lvds ? interconnecting media between transmitter and receiver ( i.e. pcb trace, connector, and cable) should be well balanced. (keep all these differential impedance and the length of media as same as possible.). ? locate by ?pass capacitors adjacent to the device pins as close as possible. ? minimize the distance between traces of a pair. (s1) to maximize common mode rejection. see following figure. ? place adjacent lvds trace pair at least twice (>2 x s1) as far away. ? avoid 90 degree bends. ? minimize the number of via on lvds traces. ? match impedance of pcb trace, connector, media (cable) and termination to minimize reflections (emissions) for cabled applications (typically 100 ? differential mode characteristic impedance). gnd +signal -signal s1 >2 x s1 gnd fig.15 pcb design guideline for lvds good no good gnd gnd monitor pad stub layer1 layer2 signal via gnd via receive r + - drive r driver receiver + - 100 point-to-point configuration receive r + - drive r + - + - driver receiver receiver receiver 100 multi-drop configuration + - + + -
technical note 21/22 www.rohm.com 2011.02 - rev. a ? 2011 rohm co., ltd. all rights reserved. BU1523KV notes for use (1) absolute maximum ratings an excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can break down devices, thus making impossible to identify breaking mode such as a short circuit or an open circuit. if any special mode exceeding the absolute maximum ratings is assumed, consideration should be given to take physical safety measures including the use of fuses, etc. (2) recommended operating conditions these conditions represent a range within which characteristi cs can be provided approximately as expected. the electrical characteristics are guaranteed under the conditions of each parameter. (3) reverse connection of power supply connector the reverse connection of power supply connector can break down ics. take protective measures against the breakdown due to the reverse connection, such as mounting an external diode between the power supply and the ic?s power supply terminal. (4) power supply line design pcb pattern to provide low impedance for the wiring between the power supply and the gnd lines. in this regard, for the digital block power supply and the analog block power supply, even though these power supplies has the same level of potential, separate the power supply pattern for the digital block from that for the analog block, thus suppressing the diffraction of digital noises to the analog block power supply resulting from impedance common to the wiring patterns. for the gnd line, give consideration to design the patterns in a similar manner. furthermore, for all power supply terminals to ics, mount a capacitor between the power supply and the gnd terminal. at the same time, in order to use an electrolytic capacitor, thoroughly check to be sure the characteristics of the capacitor to be used present no problem including the occurrence of capacity dropout at a low temperature, thus determining the constant. (5) gnd voltage make setting of the potential of the gnd terminal so that it will be maintained at the minimum in any operating state. furthermore, check to be sure no terminals are at a potential lower than the gnd voltage including an actual electric transient. (6) short circuit between terminals and erroneous mounting in order to mount ics on a set pcb, pay thorough attention to the direction and offset of the ics. erroneous mounting can break down the ics. furthermore, if a short circuit occurs due to foreign matters entering between terminals or between the terminal and the power supply or the gnd terminal, the ics can break down. (7) operation in strong electromagnetic field be noted that using ics in the strong electromagnetic field can malfunction them. (8) inspection with set pcb on the inspection with the set pcb, if a capacitor is connected to a low-impedance ic terminal, the ic can suffer stress. therefore, be sure to discharge from the set pcb by each proc ess. furthermore, in order to mount or dismount the set pcb to/from the jig for the inspection process, be sure to turn off the power supply and then mount the set pcb to the jig. after the completion of the inspection, be sure to turn off the power supply and then dismount it from the jig. in addition, for protection against static electricity, establish a ground for the assembly process and pay thorough attention to the transportation and the storage of the set pcb. (9) input terminals in terms of the construction of ic, parasitic elements are inevitably formed in relation to potential. the operation of the parasitic element can cause interference with circuit operation, thus resulting in a malfunction and then breakdown of the input terminal. therefore, pay thorough attention not to handle the input terminals, such as to apply to the input terminals a voltage lower than the gnd respectively, so that any parasitic element will operate. furthermore, do not apply a voltage to the input terminals when no power supply voltage is applied to the ic. in addition, even if the power supply voltage is applied, apply to the input terminals a voltage lower than the power supply voltage or within the guaranteed value of electrical characteristics. (10) ground wiring pattern if small-signal gnd and large-current gnd are provided, it will be recommended to separate the large-current gnd pattern from the small-signal gnd pattern and establish a si ngle ground at the reference point of the set pcb so that resistance to the wiring pattern and voltage fluctuations due to a large current will cause no fluctuations in voltages of the small-signal gnd. pay attention not to cause fluctuations in the gnd wiring pattern of external parts as well. (11) external capacitor in order to use a ceramic capacitor as the external capacitor, determine the constant with consideration given to a degradation in the nominal capacitance due to dc bias and changes in the capacitance due to temperature, etc. (12) rush current for ics with more than one power supply, it is possible that rush current may flow instantaneously due to the internal powering sequence and delays. therefore, give special consideration to power coupling capacitance, power wiring, width of gnd wiring, and routing of wiring.
technical note 22/22 www.rohm.com 2011.02 - rev. a ? 2011 rohm co., ltd. all rights reserved. BU1523KV ordering part number b u 1 5 2 3 k v - e 2 part no. part no. package kv:vqfp100 packaging and forming specification e2: embossed tape and reel (unit : mm) vqfp100 0.08 m 0.08 s 1 26 100 25 51 76 1.0 50 1.0 75 14.00.1 16.00.2 14.00.1 16.00.2 1pin mark 1.6max 1.40.05 0.10.05 0.50.1 0.2 +0.05 - 0.04 4 + 6 ? 4 0.50.15 1.00.2 0.145 +0.05 - 0.03 direction of feed reel ? order quantity needs to be multiple of the minimum quantity. embossed carrier tape (with dry pack) tape quantity direction of feed the direction is the 1pin of product is at the upper left when you hold reel on the left hand and you pull out the tape on the right hand 500pcs e2 () 1pin
r1120 a www.rohm.com ? 2011 rohm co., ltd. all rights reserved. notice rohm customer support system http://www.rohm.com/contact/ thank you for your accessing to rohm product informations. more detail product informations and catalogs are available, please contact us. notes no copying or reproduction of this document, in part or in whole, is permitted without the consent of rohm co.,ltd. the content specied herein is subject to change for improvement without notice. the content specied herein is for the purpose of introducing rohm's products (hereinafter "products"). if you wish to use any such product, please be sure to refer to the specications, which can be obtained from rohm upon request. examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the products. the peripheral conditions must be taken into account when designing circuits for mass production. great care was taken in ensuring the accuracy of the information specied in this document. however, should you incur any damage arising from any inaccuracy or misprint of such information, rohm shall bear no responsibility for such damage. the technical information specied herein is intended only to show the typical functions of and examples of application circuits for the produc ts. rohm does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by rohm and other parties. rohm shall bear no responsibility whatsoever for any dispute arising from the use of such technical information. the products specied in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, ofce-automation equipment, commu- nication devices, electronic appliances and amusement devices). the products specied in this document are not designed to be radiation tolerant. while rohm always makes efforts to enhance the quality and reliability of its products, a product may fail or malfunction for a variety of reasons. please be sure to implement in your equipment using the products safety measures to guard against the possibility of physical injury, re or any other damage caused in the event of the failure of any product, such as derating, redundancy, re control and fail-safe designs. rohm shall bear no responsibility whatsoever for your use of any product outside of the prescribed scope or not in accordance with the instruction manual. the products are not designed or manufactured to be used with any equipment, device or system which requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuel- controller or other safety device). rohm shall bear no responsibility in any way for use of any of the products for the above special purposes. if a product is intended to be used for any such special purpose, please contact a rohm sales representative before purchasing. if you intend to export or ship overseas any product or technology specied herein that may be controlled under the foreign exchange and the foreign trade law, you will be required to obtain a license or permit under the law.

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